Wafer Mount and Die Receipt
Incoming wafers are received, inspected and mounted onto a tape-and-frame carrier so they can survive every subsequent handling step.
TierC
Imported Not established
EntryNot MSME
Qualify18–30 mo
Back-End and OSAT Assembly
Everything between a die arriving and a packaged chip leaving.
This is the segment India is actually building. Assembly and test is less capital-intensive than a leading-edge fab and more tolerant of a developing supplier base, which is why Jagiroad, Sanand and Morigaon are packaging sites rather than fabs.
Talent: Trainable in 12 to 24 months from a general engineering or ITI base, which is the core of the argument for siting assembly in Assam.
What these figures mean
- Import dependency
- The share of Indian demand for this input that is met by imports today. A percentage is published only where we can state the basis for it, and the build rejects a figure that has none. “Not established” means no sourced figure exists yet, not that the figure is zero; for the domestic picture, read “Made in India today” instead.
- Made in India today
- How much of this input is actually produced in India: none, pilot scale, partial, or established. This is the field to read when import dependency is not established.
- MSME entry capital
- What it would plausibly cost an Indian MSME to enter this input at the smallest viable scale, in crore rupees. Plant and equipment only; it excludes working capital and the qualification cycle.
- Time to qualify
- How long from a working sample to a qualified first shipment, once the line exists. Qualification, not construction, is what usually decides whether an entry succeeds.
- India readiness tier
- Our verdict on whether an Indian founder can realistically enter this input, derived from the four figures above and stated as one of three tiers.
The three tiers
- Tier A: Buildable Now
- Under roughly Rs 5 crore of entry capital and 12 to 24 months to a qualified first shipment. A founder can start here.
- Tier B: Partnership or Distribution
- There is real money here, but not in manufacturing the thing. The opening is in stocking, distribution, purity uplift or a licensed partnership.
- Tier C: Not Yet
- Requires a joint venture, a technology licence, or a multinational’s balance sheet. Worth understanding, not worth starting.
Made in India today
- None
- No Indian production we can identify. Demand is met entirely from abroad.
- Pilot scale
- Made in India at laboratory, pilot-line or single-customer scale only.
- Partial
- Real Indian production exists, but it covers part of the range or part of the demand.
- Established
- Indian production is routine and qualified, at commercial volume.
18 entries
Wafer Backgrinding and Thinning
The wafer backside is ground away to reduce a 775-micron substrate to a package-compatible thickness, sometimes below 50 microns for stacked die.
TierC
Imported Not established
EntryNot MSME
Qualify30+ mo
Blade Dicing
A resin-bonded diamond blade spinning at 30,000 rpm cuts the wafer into individual die along its scribe lines. Still the volume workhorse.
TierB
Imported Not established
EntryRs 5–15 Cr
Qualify18–30 mo
Laser and Plasma Dicing
Bladeless singulation: a focused laser fractures the wafer internally, or a plasma etch cuts the streets, for die too thin or too fragile to saw.
TierC
Imported Not established
EntryNot MSME
Qualify30+ mo
Die Attach and Pick-and-Place
The operation that lifts each die off the tape and bonds it to a leadframe or substrate at rates approaching 30,000 units an hour.
TierB
Imported Not established
EntryRs 1.5–3 Cr
Qualify12–18 mo
Wire Bonding
Fine gold, copper or silver wire is welded from the die pad to the package lead by heat, pressure and ultrasonic energy, still the majority of all interconnects made.
TierC
Imported 100%
EntryNot MSME
Qualify30+ mo
Flip-Chip Bumping
Solder balls or copper pillars are plated onto the wafer while it is still whole, so the die can later be flipped and soldered face-down onto its substrate.
TierC
Imported 100%
EntryNot MSME
Qualify30+ mo
Flip-Chip Attach and Reflow
The bumped die is placed face-down onto its substrate and the joints are formed, either by mass reflow through an oven or by thermocompression bonding one die at a time.
TierC
Imported Not established
EntryNot MSME
Qualify30+ mo
Underfill Dispense and Cure
A filled epoxy is drawn into the gap under a flip-chip die and cured, so thermal stress is carried by the encapsulant rather than by the solder joints.
TierC
Imported Not established
EntryNot MSME
Qualify30+ mo
Moulding and Encapsulation
Epoxy moulding compound is forced around the bonded die under heat and pressure in a multi-cavity tool, forming the black body of the package.
TierB
Imported Not established
EntryRs 5–15 Cr
Qualify18–30 mo
Post-Mould Cure, Deflash and Laser Mark
The compound is fully cross-linked in a batch oven, moulding flash is stripped from the leads, and the package is laser-marked with part, lot and date code.
TierA
Imported Not established
EntryRs 1.5–3 Cr
Qualify12–18 mo
Lead Finish and Plating Operations
Exposed leads are electroplated with a tin-based finish for solderability, then trimmed and formed to their final package geometry.
TierA
Imported Not established
EntryRs 3–5 Cr
Qualify12–18 mo
Package Singulation
Finished packages are separated from the moulded strip or matrix by saw or punch, the last mechanical operation before the part is tested.
TierB
Imported Not established
EntryRs 3–5 Cr
Qualify18–30 mo
Fan-Out Wafer-Level Packaging
Die are reconstituted onto a carrier and a redistribution layer is built directly over them, eliminating the package substrate entirely.
TierC
Imported Not established
EntryNot MSME
Qualify30+ mo
Interposer and 2.5D Packaging
Multiple die are mounted side by side on a silicon or organic interposer carrying dense wiring and through-vias, the packaging behind every AI accelerator.
TierC
Imported 100%
EntryNot MSME
Qualify30+ mo
3D Stacking and Hybrid Bonding
Die are stacked vertically and joined copper-to-copper without solder, giving interconnect densities two orders of magnitude beyond microbumps.
TierC
Imported Not established
EntryNot MSME
Qualify30+ mo
System-in-Package and Module Assembly
Several die plus passives are assembled into a single package or module, the format Kaynes Semicon used for India’s first commercially packaged multi-chip parts.
TierB
Imported Not established
EntryRs 5–15 Cr
Qualify12–18 mo
Tape-and-Reel and Finished-Goods Packing
Tested parts are loaded into carrier tape or trays, baked and sealed against moisture, and labelled for shipment. The last operation before the part leaves.
TierA
Imported Not established
EntryRs 1.5–3 Cr
Qualify6–12 mo